CVE-2022-27813

Motorola MTM5000 series firmwares lack properly configured memory protection of pages shared between the OMAP-L138 ARM and DSP cores. The SoC provides two memory protection units, MPU1 and MPU2, to enforce the trust boundary between the two cores. Since both units are left unconfigured by the firmwares, an adversary with control over either core can trivially gain code execution on the other, by overwriting code located in shared RAM or DDR2 memory regions.

CVSS v3 8.1 HIGH

8.1^/10

CVSS v3 : HIGH

V3 Legend

Vector :

Exploitability : 1.5 / Impact : 6.0

Attack Vector LOCAL

Attack Complexity LOW

Privileges Required HIGH

User Interaction NONE

Confidentiality Impact LOW

Integrity Impact HIGH

Availability Impact HIGH

Scope CHANGED

References

Link	Resource
https://tetraburst.com/	Technical Description
https://tetraburst.com/	Technical Description

Configurations

Configuration 1 (hide)

AND

cpe:2.3:o:motorola:mtm5500_firmware:-:*:*:*:*:*:*:*

cpe:2.3:h:motorola:mtm5500:-:*:*:*:*:*:*:*

Configuration 2 (hide)

AND

cpe:2.3:o:motorola:mtm5400_firmware:-:*:*:*:*:*:*:*

cpe:2.3:h:motorola:mtm5400:-:*:*:*:*:*:*:*

History

21 Nov 2024, 06:56

Type	Values Removed	Values Added
CVSS	v2 : ~~unknown~~ v3 : ~~8.2~~	v2 : unknown v3 : 8.1
References	~~() https://tetraburst.com/ - Technical Description~~	() https://tetraburst.com/ - Technical Description

Information

Published : 2023-10-19 10:15

Updated : 2024-11-21 06:56

NVD link : CVE-2022-27813

Mitre link : CVE-2022-27813

CVE.ORG link : CVE-2022-27813

JSON object : View

Products Affected

motorola

mtm5400
mtm5500_firmware
mtm5400_firmware
mtm5500

CWE

CWE-1260

Improper Handling of Overlap Between Protected Memory Ranges

NVD-CWE-noinfo

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8.1 /10